The present invention relates to a semiconductor wafer comprising a plurality of micro-machined components, and in particular, though not limited to such a semiconductor wafer comprising micro-mirrors, and the invention also relates to a method for fabricating the semiconductor wafer.
Semiconductor wafers comprising a plurality of micro-machined components are well known. Additionally, semiconductor wafers which comprise a plurality of micro-machined micro-mirrors are also well known. For example, U.S. Pat. No. 6,201,631 of Graywell discloses such a semiconductor wafer and also a method for fabricating such a wafer. In general, the micro-mirrors of such semiconductor wafers are arranged in a matrix array formed by a plurality of spaced apart rows and spaced apart columns. Any number of micro-mirrors may be provided, for example, a sixteen by sixteen array of two hundred and fifty-six micro-mirrors is commonly provided. Indeed, it is known to provide micro-mirror arrays of array sizes of two by two arrays up to one thousand by one thousand arrays and even greater.
Typically, such semiconductor wafers comprising an array of micro-mirrors comprise a support substrate, typically a base substrate and a component substrate which are bonded together. The component substrate comprises a handle layer which supports a membrane layer in which the micro-mirrors are formed. Cavities are formed in the handle layer for exposing the micro-mirrors through the handle layer. Typically, a buried oxide layer is located between the membrane layer and the handle layer, and after etching of the cavities in the handle layer the oxide layer adjacent the micro-mirrors is etched for exposing the micro-mirrors through the cavities in the handle layer. Electrodes are formed on the base substrate at appropriate locations, so that when the component substrate is bonded to the base substrate the electrodes are appropriately aligned with the corresponding micro-mirrors through the cavities in the handle layer, for co-operating with the micro-mirrors for tilting thereof.
The handle layer acts as a spacer for spacing the membrane layer with the micro-mirrors formed therein apart from the base substrate, and in turn the electrodes formed thereon for facilitating tilting of the micro-mirrors. The depth by which the handle layer spaces the membrane layer from the base substrate is largely determined by the area of the mirrors, and the maximum angle of tilt required. However, in general, it is desirable that the spacing between the membrane layer and the base substrate should be relatively small so that the electrodes on the base substrate are relatively close to the micro-mirrors, thereby minimising the voltages required on the electrodes for tilting the mirrors. Typically, desired spacings between the base substrate and the membrane layer are in the range of 10 xcexcm to 200 xcexcm. This requires that the handle layer which is supporting the membrane layer must be machined to a depth of between 10 xcexcm and 200 xcexcm, depending on the desired spacing, prior to bonding to the base substrate. This results in a serious problem in that in general, it is desirable that the handle layer should be of a depth of at least 350 xcexcm, and preferably 500 xcexcm for supporting the membrane layer until the membrane layer is otherwise supported, for example, by the base substrate. Thus, by having to reduce the depth of the handle layer to between 10 xcexcm to 200 xcexcm there is a considerable risk of damage to the membrane layer and the micro-mirrors while the membrane layer is supported only by the thin handle layer, until the component layer is bonded to the base substrate. This is undesirable.
There is therefore a need for a semiconductor wafer comprising a plurality of micro-mirrors, or indeed, any other micro-machined components which overcomes this problem. There is also a need for a method for fabricating a semiconductor wafer having a plurality of micro-mirrors or other micro-machined components which similarly overcomes the problem.
The present invention is directed towards providing such a semiconductor wafer and a method.
According to the invention there is provided a semiconductor wafer comprising a support substrate and a component substrate carried on the support substrate, the component substrate comprising:
a membrane layer having a plurality of spaced apart micro-machined components formed therein,
a handle layer supporting the membrane layer and having a plurality of cavities corresponding to the micro-machined components extending through the handle layer to the respective corresponding micro-machined components,
the support substrate having a first surface facing in a first direction and defining a second surface facing in a second direction away from and opposite to the first direction, the support substrate defining an intermediate surface at a level intermediate the first and second surfaces and facing in the second direction, the support substrate comprising:
a plurality of spaced apart pedestals extending in the second direction from the intermediate surface into respective corresponding ones of the cavities in the handle layer of the component substrate, each pedestal terminating in the second surface spaced apart from the corresponding micro-machined component for accommodating movement of the micro-machined component,
at least one electrode carried on the second surface of each pedestal for co-operating with the corresponding micro-machined component,
a plurality of electrically conductive addressing tracks on one of the first and the intermediate surfaces of the support substrate for carrying address signals to be conducted to the respective electrodes, and
an electrical conductor corresponding to each electrode extending through a corresponding via through the corresponding pedestal from the electrode to a corresponding one of the addressing tracks on the support substrate for conducting the corresponding address signal to the corresponding electrode.
In one embodiment of the invention a plurality of mutually insulated electrodes are carried on each pedestal, and each electrode is connected to the corresponding one of the addressing tracks on the support substrate by the corresponding one of the electrical conductors extending through the corresponding one of the vias.
Preferably, the addressing tracks on the support substrate communicate the corresponding electrodes on the pedestals with a plurality of corresponding mutually insulated addressing terminals for addressing the electrodes. Advantageously, the support substrate comprises a terminal carrier extending in the second direction from the intermediate surface for carrying the addressing terminals, and an electrical conductor corresponding to each addressing terminal extends from the corresponding addressing terminal through a corresponding via through the terminal carrier to the corresponding one of the addressing tracks on the support substrate for communicating the addressing terminal with the corresponding addressing track. Advantageously, the terminal carrier terminates in the second surface, and the addressing terminals are located on the second surface.
In one embodiment of the invention the addressing tracks are located on the first surface of the support substrate, and preferably, the vias through the respective pedestals extend to the first surface for accommodating the corresponding electrical conductors therethrough to the addressing tracks. Alternatively or additionally, the addressing tracks are located on the intermediate surface of the support substrate, and the vias through the respective pedestals extend to the intermediate surface for accommodating the corresponding electrical conductors to the addressing tracks.
In one embodiment of the invention the handle layer defines a first surface of the component substrate, the first surface of the component substrate facing in the first direction, and the component substrate being carried on the support substrate with the first surface of the component substrate abutting the intermediate surface of the support substrate.
In another embodiment of the invention the support substrate comprises a base layer defining the first and the intermediate surfaces, the pedestals extending in the second direction from the base layer. Advantageously, an insulating layer is located between the base layer and the respective pedestals of the support substrate. Preferably, the insulating layer extends over the surface of the base layer of the support substrate and defines the intermediate surface.
In one embodiment of the invention the transverse cross-sectional area of each pedestal is substantially similar to the area of the corresponding micro-machined component in plan view. Preferably, the transverse cross-sectional area of each cavity in the handle layer of the component substrate substantially defines the transverse cross-sectional area of the corresponding pedestal.
In another embodiment of the invention the respective pedestals are identical to each other, and preferably, the second surfaces of the respective pedestals define a common plane, and advantageously, the second surface defined by the terminal carrier defines a common plane with the second surfaces of the respective pedestals. Preferably, an insulating layer is located between the handle layer and the membrane layer of the component substrate. Advantageously, each cavity through the handle layer of the component substrate extends through the insulating layer between the handle layer and the membrane layer to the corresponding micro-machined component.
In one embodiment of the invention the membrane layer and the handle layer of the component substrate are of semiconductor material, and preferably, the membrane layer and the handle layer of the component substrate are of single crystal silicon material.
In one embodiment of the invention the support substrate is of semiconductor material, and preferably, the support substrate is of single crystal silicon material.
In another embodiment of the invention the micro-machined components are micro-mirrors. Preferably, the respective micro-machined components are identical to each other. Advantageously, the micro-machined components are arranged in a matrix array defining a plurality of spaced apart columns and spaced apart rows of the micro-machined components.
Additionally the invention provides a method for fabricating a semiconductor wafer comprising a plurality of micro-machined components formed therein, the method comprising the steps of:
fabricating a component substrate having a membrane layer supported on a handle layer,
forming the micro-machined components spaced apart from each other in the membrane layer,
forming a plurality of cavities in the handle layer corresponding to the micro-machined components, each cavity extending through the handle layer to the corresponding micro-machined component,
forming a support substrate having a first surface facing in a first direction and defining a second surface facing in a second direction away from and opposite to the first direction and defining an intermediate surface at a level intermediate the first and second surfaces facing in the second direction,
forming a plurality of spaced apart pedestals in the support substrate corresponding to the cavities, the pedestals extending from the intermediate surface in the second direction and terminating in the second surface,
forming at least one electrode on the second surface of each pedestal,
forming a plurality of electrically conductive addressing tracks on one of the first and the intermediate surfaces of the support substrate for carrying signals to be conducted to the respective electrodes,
forming a via through each pedestal corresponding to each electrode, each via extending from the second surface of the corresponding pedestal for accommodating a corresponding electrical conductor from the electrode to the corresponding one of the addressing tracks,
forming the electrical conductors in the respective vias for connecting the corresponding electrodes to the corresponding addressing tracks, and
joining the component substrate to the support substrate so that the pedestals extend into respective corresponding ones of the cavities in the handle layer of the support substrate with the second surfaces defined by the pedestals spaced apart from the corresponding micro-machined components for accommodating movement of the micro-machined components, and the electrodes on the pedestals co-operating with the corresponding micro-machined components.
In one embodiment of the invention a plurality of mutually insulated electrodes are formed on each pedestal, and a corresponding number of vias and electrical conductors are formed through each pedestal for connecting the respective electrodes to corresponding ones of the respective addressing tracks.
Preferably, the vias through the pedestals are formed prior to forming the electrodes thereon.
In one embodiment of the invention a plurality of mutually insulated addressing terminals are formed on the support substrate and are electrically connected to respective corresponding ones of the addressing tracks for addressing corresponding ones of the electrodes.
In another embodiment of the invention a terminal carrier is formed on the support substrate extending from the intermediate surface in the second direction, the addressing terminals being formed on the terminal carrier, a plurality of vias corresponding to the respective addressing terminals are formed extending from the corresponding ones of the addressing terminals through the terminal carrier for accommodating corresponding electrical conductors from the addressing terminals to the corresponding addressing tracks, and the electrical conductors are formed in the respective vias through the terminal carrier for communicating the addressing terminals with the corresponding ones of the addressing tracks for facilitating addressing of the respective electrodes through the corresponding addressing tracks from the corresponding addressing terminals. Preferably, the terminal carrier terminates in the second surface of the support substrate, and the addressing terminals are formed on the second surface of the terminal carrier.
In one embodiment of the invention the addressing tracks are formed on the first surface of the support substrate, and preferably, each via in each pedestal extends through the support substrate to the corresponding addressing track. Alternatively or additionally, the addressing tracks are formed on the intermediate surface of the support substrate, and each via in each pedestal extends to the corresponding addressing track.
In one embodiment of the invention the handle layer defines a first surface of the component substrate, the first surface facing in the first direction, and the component substrate and the support substrate are joined with the first surface of the component substrate abutting the intermediate surface of the support substrate.
In another embodiment of the invention the support substrate is formed by joining a pedestal layer to a base layer, the base layer defining the first surface of the support substrate, and forming the pedestals in the pedestal layer.
In another embodiment of the invention the pedestal layer is patterned by a photo-lithographic process and is then etched for forming the pedestals. Preferably, the terminal carrier is formed in the pedestal layer during etching of the pedestal layer for forming the pedestals.
In one embodiment of the invention an insulating layer is formed between the pedestal layer and the base layer. Preferably, the pedestal layer is etched down to the insulating layer, which acts as an etch stop layer during forming the pedestals.
In one embodiment of the invention an insulating layer is formed between the handle layer and the membrane layer of the component substrate.
In another embodiment of the invention the insulating layer formed between the handle layer and the membrane layer in the component substrate is etched through the corresponding cavities in the handle layer for exposing the micro-machined components in the corresponding cavities. Preferably, the first surface of the handle layer of the component substrate is patterned by a photo-lithographic process for defining the cavities, and the cavities are then etched through the handle layer. Advantageously, the insulating layer between the handle layer and the membrane layer of the component substrate acts as an etch stop layer during etching of the cavities in the handle layer.
The advantages of the invention are many. A particularly important advantage of the invention is that the component substrate is provided with a handle layer of adequate depth for supporting the membrane layer, thereby minimising risk of damage to the membrane layer during fabrication of the semiconductor wafer. This is achieved by virtue of the fact that the support substrate is fabricated with pedestals for carrying the electrodes which extend into the cavities formed in the handle layer of the component substrate. This, thus, permits the handle layer of the component substrate to be recessed into the support substrate, thus permitting a relatively deep handle layer to be provided for supporting the component layer.
A further advantage of the invention is that by virtue of the fact that the electrodes on the pedestals are connected to electrically conductive addressing tracks on the first and/or intermediate surfaces of the support substrate, electronic components such as CMOS devices and other devices may be formed on the first and/or intermediate surfaces of the support substrate of the semiconductor wafer.
These and other advantages and objects of the invention will be readily apparent from the following description of some preferred embodiments thereof, which are given by way of example only, with reference to the accompanying drawings.